IEEE 2015 – VLSI
1. Floating-Point Butterfly Architecture
Based on Binary Signed-Digit Representation.
2. High-Speed and Energy-Efficient Carry
Skip Adder Operating Under a Wide Range of Supply Voltage Levels.
3. Energy and Area Efficient Three-Input XOR/XNORs
With Systematic Cell Design Methodology.
4. A Fully Digital Front-End Architecture
for ECG Acquisition System With 0.5 V Supply.